Sr. RFIC Layout Designer (Silicon Engineering)
Skills
- Proficient in RFIC and analog custom circuit layout techniques.
- Experience with advanced node IC layouts (22nm, 16nm, 7nm, 5nm or below).
- Ability to handle high-frequency circuits up to 50GHz.
- Knowledge of layout considerations for device matching, coupling, and noise isolation.
- Familiarity with programming in SKILL, shell scripting, Perl, Python or similar languages.
- Experience with revision control systems and Linux environment.
Responsibilities
- Collaborate with IC designers and chip leads to define chip floor plans including power, ground distribution, and pad locations.
- Estimate layout schedules and assess design complexities early in the process.
- Execute custom RF and analog circuit block layouts focusing on matching and minimizing parasitic capacitance.
- Perform and resolve design rule, electrical rule, and layout versus schematic checks.
- Integrate top-level layouts with electrostatic discharge structures and finalize tape out.
- Coordinate with EDA tool suppliers to trial new layout tools and features.
- Develop guides and demos to improve team layout techniques.
Education
- Bachelor’s degree in Electrical or Computer Engineering preferred.
- Equivalent professional experience considered in lieu of degree.
Benefits
- Comprehensive medical, vision, and dental insurance.
- 401(k) retirement plan.
- Short and long-term disability insurance and life insurance coverage.
- Paid parental leave and minimum three weeks of paid vacation.
- 10 or more paid holidays annually.
- Five days sick leave per year for exempt employees.
- Employee Stock Purchase Plan with discounts on company stock.
- Potential long-term incentives including stock options and discretionary bonuses.
Average salary estimate
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