Mixed-Signal Modeling/Verification Engineer, Staff Engineer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

As an Mixed-Signal Modeling/Verification Engineer, Staff Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Compute, Storage, Security, and Networking. In this role, you’ll be a key member of the Copper Ethernet PHY team, working on the development of next-generation analog and mixed-signal designs for Enterprise Networking products.

What You Can Expect

• Solid understanding of analog circuit design and fundamental analog device behavior.
• Proven experience in mixed-signal verification and real-number modeling of AMS systems.
• Proficiency in SystemVerilog, real-number modeling, and Verilog-AMS.
• Deep knowledge of AMS and analog design blocks such as ADCs, DACs, VCOs, PLLs, and PGAs.
• Hands-on experience with transistor-level simulations using SPICE or Spectre.
• Familiarity with Cadence design tools, including Virtuoso and Xcelium.
• Scripting skills in languages such as Python or Perl.
• Familiarity with signal processing concepts and tools like Python or MATLAB.
• A Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Science, or a related field, with 3+ years of relevant industry experience

What We're Looking For

• Developing top-level and block-level mixed-signal testbenches.
• Creating accurate, simulation-efficient behavioral models for analog blocks.
• Validating behavioral models against transistor-level analog designs.
• Collaborating with design teams to review specifications and develop comprehensive AMS verification plans.
• Writing test stimuli, analyzing waveforms and simulation results, and comparing them with expected behavior.
• Debugging failures, resolving issues in testbenches/models/checkers, and managing bug tracking through closure.

Expected Base Pay Range (USD)

106,700 - 157,840, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

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