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Silicon Reliability Engineer

About Etched

Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents.

Job Summary

Etched is seeking a skilled and detail-oriented Silicon Reliability Engineer to join our team. The successful candidate will ensure that critical semiconductor components and custom ASICs are characterized and qualified for our demanding high-performance systems with the rigorous reliability standards essential for our datacenter applications. This position requires a deep understanding of semiconductor reliability engineering principles from fab process to assembly and packaging; and from CMOS operating physics to copper bump and solder ball material science. A successful candidate should also expect to influence product designs, manufacturing processes and metrics, silicon test processes, and participate in other related activities as necessary. The role also requires experience working with design partners and suppliers, ODMs, and JDMs, and occasional travel.

Key responsibilities

  • Review and Direct Reliability Standards:
Lead the development, implementation, and management of reliability standards for semiconductor design partners and suppliers working with Etched. Ensure that all components have fully developed characterization and qualification plans that meet or exceed the required reliability benchmarks within the bounds of practical implementation

  • Supplier Reliability Evaluation:
Review and verify reliability reports from suppliers, ensuring accuracy and adherence to Etched’s standards. Provide guidance and feedback to suppliers to ensure continuous improvement in reliability performance.

  • Component Selection and Evaluation:
Collaborate with cross-functional teams to review and recommend component selection criteria based on reliability performance. Ensure that all selected components are capable of meeting the long-term reliability requirements of our datacenter applications.

  • Reliability Test Plan Review:
Evaluate and approve reliability test plans proposed by external vendors. Ensure that the test methodologies and conditions are sufficient to validate long-term reliability under expected operating conditions, and that appropriate trade-offs are considered to ensure economic viability of the plans. Correlate reliability tests to FMEA priorities to efficiently mitigate risks.

  • Data Analysis and Deep Dive:
Conduct in-depth analysis of test and reliability data provided by our test engineering teams, by suppliers and by vendors. Identify trends, potential issues, and areas for improvement to enhance overall reliability, or to maximize performance without jeopardizing reliability. Participate in FA, RCA and corrective action recommendations related to field failures.

  • ODM/JDM Collaboration:
Work closely with ODMs (Original Design Manufacturers) and JDMs (Joint Design Manufacturers) to ensure that all products meet Etched quality and reliability standards. Provide technical guidance and support to maintain maximum operational uptime and long-term reliability.

  • Reliability Standards:
Review and establish reliability metrics and standards for silicon components, ensuring they meet the stringent requirements for long-term reliability in data center environments including initial qualification and ongoing monitoring.

You may be a good fit if you have

  • Bachelor’s or Master’s degree in Reliability Engineering, Electrical Engineering, or a related field.

  • 7+ years of experience in reliability engineering, with a focus on semiconductor devices. Datacenter or high-performance computing application experience is a plus.

  • Strong understanding of industry reliability standards, testing methodologies, and data analysis techniques. DFMEA / PFMEA / SPC Engineering analysis experience desired.

  • Experience working with suppliers, ODMs, and JDMs in a high-tech environment.

  • Excellent communication skills, with the ability to convey complex technical concepts to diverse stakeholders.

  • Proven ability to manage multiple projects and deliver results in a fast-paced environment.

Benefits

  • Full medical, dental, and vision packages, with generous premium coverage

  • Housing subsidy of $2,000/month for those living within walking distance of the office

  • Daily lunch and dinner in our office

  • Relocation support for those moving to West San Jose

How we’re different

Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We are a fully in-person team in West San Jose, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

Average salary estimate

$150000 / YEARLY (est.)
min
max
$120000K
$180000K

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by burning the transformer architecture into our chips, we’re creating the world’s most powerful servers for transformer inference.

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Full-time, onsite
DATE POSTED
June 16, 2025

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